Friday, November 4, 2016

Circuits and Electronics - Breaking the Abstraction Barrier (Lecture 28)

Video Lectures: -  https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-and-electronics-spring-2007/video-lectures/lecture-25/

Lecture Notes: - https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-and-electronics-spring-2007/lecture-notes/

This is our final sequence. So in this sequence, we will violate just about everything that we have learned in this course just to show you that rules and abstractions only take you this far.
At the end of the day, we made a set of assumptions. But as long as you work within those assumptions, you are OK. However, in practical life, many of these assumptions are
violated and things do not quite behave as we expect them to. So you have to be very careful here and understand where the abstractions are violated. And in many cases, you really have to go back to
fundamentals and do things again.

And we got into that playground by making the assumptions of the lumped matter discipline. There were three key assumptions. One assumption was that you are not going to have any net charge build up inside our elements. Notice that even for capacitors, the net charge build up on both the positive and negative plates is 0, so they satisfy our discipline. The second was dPhi by dt was going to be
zero outside our elements. The third assumption of the lumped matter discipline was that our signal speeds of interest would be substantially lower than the speed of light.

So we will start with what I call the double take. So consider the following little scenario. So suppose I have a voltage source, v_I. And that voltage source connects through some resistor, R. And I can measure and observe the voltage v_0 at this point. Let's further assume that from this point, I have a bunch of other wires - three wires- going to different parts of the circuit.

And then one of them  may connect to some other pieces of circuitry, an inverter, in this case.
And then from the inverter, I may have a connection going to something else. Now, let me assume that my input voltage takes a 0 to 1 transition.

What I expect at v_0, given that I'm not connecting my circuit anywhere, in that I have an open circuit here-- so this input connects to an open circuit here. So given such a scenario, my input step that goes from 0 to 1, or 0 to 5 volts, I should see the same thing reflected at v_0.

But I want to show you a demonstration where you are going to see something totally strange.
There would be a break in the signal - a forbidden region.

We then see the different scenarios that take place when voltage is measured at V_O and V_E.

Let's look at what is going on, OK? It turns out that that wire is more properly modeled as a
distributed LC circuit. This is actually the model for a transmission line.

For a step rise in the voltage, it actually turns out that you can look upon the effect of this inductance
capacitance distributed sequence on that step as if it behaved like a resistor. And that resistance is called the characteristic impedance of this wire. For coaxial cable is on the order of 50 ohms. OK.

So what happens now? So here is my 5 volt step. And the 5 volt step at this point, at V0, suddenly thinks it's seeing it as resistance R looking in.

It's an instantaneous voltage divider, and so the voltage divider divides this into 2.5 volts. So what I end up with is 2.5 volts.
That pulse comes all the way down to VE. So that 0 to 2.5 volt pulse then shows up all the way at
the very end. OK, notice that it takes some time to get there. So I get the 2.5 volts at VE. And now this is an open circuit. So the energy has to go someplace. So the pulse comes to the end, and then it
starts to run back. So notice what will happen at VE here. At VE, because the pulse has started to head back, what ends up happening is that there are two wave forms. There is the forward going wave, 0 to 2.5, and then there's the backward going wave, 0 to 2.5 volts as well. And the net is that the effective voltage at VE is gonna look like  a 0 to 5 volt pulse.

And how come anything worked?  The first reason is the following. The first reason is, by and large, when I have connection-- so let's say I have a gate driving another gate. Notice that there's a wire connecting the two pairs of gates, and I'm observing the signal at the end of the wire. I may have a second wire driving another gate. And again, I'm observing the signal at the end of the wire.
I'm not looking at the signal at the middle of the wire. If I look at the signal at the middle, I have the danger that I saw with v0 here. So in many cases, I look at the signal at the end off our wires.
And recall at the end of the wire here, my output had a nice clean 0 to 5 volt transition. This would be at vE. That would be quite nice. So this thing worked.

So do not try to take connections from the middle of wires.

One idea is called source termination. So in this idea, when you have a long wire, so in this case,
I have a long wire here, what you do is you have-- and this long wire has a characteristic impedance of R, say, 50 ohms. So then what you do is you connect a resistance of 50 ohms at the source.
And then at the end of that, do not connect any other resistances. Just leave it as an open circuit or connect it to circuits that offer infinite or virtually infinite input resistance. And then at that endpoint, you will see a nice little 0 to 5 volt waveform.

So there's no trouble there. And what the source resistor is really doing for you is that when the waveform comes shuttling back, the energy in the return wave is then absorbed in the source resistor.
So that energy comes back and gets cleanly absorbed in the source resistor, and you don't see some other funky shuttling back and forth. So that energy is dissipated, and things are completely fine.
So this idea is called source termination. You have a resistor here that terminates the wave of energy
that is coming back at you.

The second idea is-- what I'm going to do is recall the problem that I had. I had a waveform that was showing up at the end at vE, and that was giving  2.5 volts. And I said, look, it was an open circuit at vE. vE was initially open, and this energy had nowhere to go and so it bounced back. So what I'm going to do instead is the following. I'm not going to put an open circuit. Rather, I am going to connect a resistance here. Let's say this was 50 ohms. I want to connect a 50-ohm resistance here, so R.  So here what it's going to do, It's going to see a 50-ohm resistor, and the energy is going to be
absorbed in the resistor. We are  going to see a 2.5-volt waveform there. Notice that there's no waveform going back. There is no wave going back because it's been absorbed in the resistor.

So oftentimes in circuits, we can put a resistance here at vE, and that will cause the waveform to be cleanly absorbed, and I don't see this funky little step.

 There's a third reason why our circuits worked so far. And the reason is  the wires were short.
When you have long wires, signals take time to propagate down those long wires, and it was that propagation time that was much longer than my signal speed of interest.

With the 2.5 jump at vE, notice that I'm going to get a reflection as before, so we end up with 5 volts, zero to 5 volts, at V, which is not surprising. It's the same as before. But notice that my wave reaches back it really, really quickly and this will then transition up to the full 5 volts. So really what is going on is that my T and 2T are very, very close together. So in the past, where my T and 2T were very long, here I take a quick little blip and then my wave form goes up to 5 volts right away.


let's look at another scenario that I'm going to call the double dip. Before I dive into the double dip, let me mention-- it just occurred to me-- mention one more idea that would make the double take not as significant. And the idea there is, notice that I had a circuit where they got this funky little wave form at 2.5 volts. One way around that is to use a clock. So the point number four would be use a clock. So here, if I had a clock that we said, look at the signal only on the rising edge of the clock,
I would not have any trouble. This is because by arranging the clock carefully, according to the
lengths of wire in the circuit, I could make sure that whenever I expected the signal to be funky because of wire length and the speed of signals, I could just make sure that I did not sample the
signal at that time.


Now, let's look at a second situation  called  the double dip where there are two inverters.  The  power supply connects to a long wire to a big inverter. And the same power supply also connects to another inverter. This works okay.


I need to do some impedance matching, create a parallel termination of a 50 ohm, 50 ohm is a pretty low resistance. And the moment I add that resistance, I'm telling you that  we will see something really strange.  At the output of the second inverter, we see something really, really funky. Wires are not perfect wires, and that is what is happening. A wire abstraction is being violated.


And let us say that inverter is being modeled here,  using a PFET and an NFET.
So what is going on? I was getting these funky spikes at the output. It turns out that  it has some reasonable inductance. So modeling its inductance and sticking that inductance of this little circuit.
Corresponding to that long length of wire. So let me draw some signals here.
When the current steps up and down, there is a change in current. Now recall that inductors do not like to change the current that flows through them instantaneously. They like to hold their current.
And that sudden burst in the current is going to cause a spike, a voltage across the inductor.
The voltage across inductors is given by Ldi dt, so plus minus Ldi dt.

Why did our circuits work before?

Keep wires short. If I keep my wires short, the inductance associated with the wires is going to be short.  If L is small, than Ldi dt is also going to be very small.  So you try be clever well how you build the wires for power supplies, and so on, and try to build low inductance wires.
Third point-  the other thing you can do is notice here that the problem occurred because I had the same power circuit. I had Vs with the same power circuit for both my high powered MOSFET--
so this was a big FET, and the same circuit going to the power rail for a small inverter. So I shared the same power circuit for something that was very sensitive and something that was a current hog.
So one solution is keep separate power grids.

Do not connect these two things together. So for example, what we could do is take a connection directly from the power supply, or even have a separate power supply and connect it to the other inverter. So this way, since we were taking the connection directly from the power supply, there is a separate circuit which had a big current draw was going to be isolated from this other circuit.

 The next idea, avoid big current swings. Try not to swing large amounts of current in one final swoop. And I fully understand that sometimes you just can't do that. You have to charge up a big capacitor for whatever reason. So another way to do that is if you do really want to have big current swings, then avoid sharp transitions. Try to make your transitions slightly smoother. Have more of a slope to them.




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