I made some video tutorials to round up the basics of LMMS. Here is the first which is using the Control key to copy tracks

https://www.youtube.com/watch?v=dt4wWCkuQ-o

Here is the second one to move and copy notes.

https://www.youtube.com/watch?v=WNkD-UHQ4aA

## Saturday, May 28, 2016

## Monday, May 16, 2016

### Music On The Go: LMMS tutorial 2: - Sidebar

Video:- https://www.youtube.com/watch?v=Ow4fHTmd1mo

First thing is to learn to load a project

After saving a project, to see it in load project, hit refresh button first.

In the instrument plugins, the most useful one is at the bottom - ZynAddSubFx

You can load samples into My Samples

Presets are instruments. Bitinvader one of the sound files. ZynAddSubFx has many sound files. Right click to add instruments to the song editor

Instruments plugins can be dragged to use them .

First thing is to learn to load a project

After saving a project, to see it in load project, hit refresh button first.

In the instrument plugins, the most useful one is at the bottom - ZynAddSubFx

You can load samples into My Samples

Presets are instruments. Bitinvader one of the sound files. ZynAddSubFx has many sound files. Right click to add instruments to the song editor

Instruments plugins can be dragged to use them .

## Sunday, May 15, 2016

### Music On The Go: LMMS tutorial 1 : Piano Roll, Beat/Bass Line Editor

I remember some time back when I learnt Sony Acid Express for music but it seems LMMS is pretty good as well so I am checking out some tutorials on it.

Video:-https://www.youtube.com/watch?v=4dYxV3tqTUc

First check the settings.

Use Triple Oscillator to get to piano roll.

Quantisation helps to move and resize the notes.

Use control key and mouse scroll wheel to zoom in and out.

The bass line editor on the right can fill in the drum beats

It is possible to add drum beats by opening up My Samples on the left.

Video:-https://www.youtube.com/watch?v=4dYxV3tqTUc

First check the settings.

Use Triple Oscillator to get to piano roll.

Quantisation helps to move and resize the notes.

Use control key and mouse scroll wheel to zoom in and out.

The bass line editor on the right can fill in the drum beats

It is possible to add drum beats by opening up My Samples on the left.

## Friday, May 6, 2016

### Circuits and Electronics - Undamped Second Order Systems (Lecture 17)

Video Lectures:- http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-and-electronics-spring-2007/video-lectures/lecture-15-part-1/

Lecture Notes:- http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-and-electronics-spring-2007/video-lectures/6002_l15.pdf

Second-order systems will have two independent energy storage elements.for example, have a capacitor and an inductor, or you might have two capacitors that are independent of each other.

We are going to get dynamics that are governed by second-order differential equations.

An inverter driving another inverter. is a perfectly good system to study for second-order systems.

The equivalent circuits for these two inverters consists of a a five-volt supply V_S, two MOSFETS, load resistors and parasitic capacitance

The reason they are called them parasitic capacitances is that it's not something we usually see, but it's something that appears whether we like it or not.

We are going to look at what the waveforms are going to look like at A, B, and C.

So let's say the waveform at A is some square wave that looks like this. 0 to 5, back down to 0, and then up, to 5 again. So that is my waveform at A. So as a low voltage is applied at V_A, a high voltage is obtained at V_B. And then when A jumps up to a high value, Bgets pulled down low. So the B node gets pulled down low, and it goes down pretty fast. And the reason it goes down pretty fast, as you will, is that the on resistance of the MOSFET is very, very low. So when VA falls here, the first time transistor is going to shut off, and the node B needs to be pulled up to a high value.

Now notice that the capacitor is initially charged to a low value, C_GS, and it needs to charge up through the five-volt and the 2K resistor, and there's the C_GS.

So in this case, let's assume it's a pretty large time constant, the waveform is going to start off at 0, and it will be rising like a capacitor charging up. Again, this is going to reflect some time constant. Tau, the time constant for this, would be reflective of two kilohms times C_GS.

Then when V_A rises again, V_B is going to drop. Because R on is very low, it's going to drop quickly. And then it's going to continue like this.

So V_C will start off at 0, because V_B is high. And then V_C goes up to five volts because V_B is low. And then at this point, VB starts to rise. At some point, VB is going to rise high enough to hit the threshold value for the MOSFET at the second inverter. And so because the MOSFET turns on, as the voltage at B goes above the threshold value for the MOSFET whose input is B, the output is going to fall. So, at some point, the MOSFET output , the second inverter output, V_C is going to fall. And then, as the signal at B goes down, the output at C is going to go up again.

As node B rose up slowly, the voltage took some time to get to VT, and because of that, there was a delay at C. So what do we do? We are going to try to speed up node B by reducing the time constant. We can say, hey, let's go change C_GS. But C_GS is there so it cannot be changed.

So we have to try to reduce R_L, the 2-kilohm resistor. To do that, a 50-ohm resistor is placed in parallel with the 2-kilohm resistor, together with a switch. So when the switch is shut, then the 50-ohm resistor comes in parallel with the 2-kilohm resistor, making the effective parallel resistance more or less 50 ohms.

At some point at B, sharply rising waveform was expected to be seen but instead,

an oscillatory waveform that seemed to oscillate, and decayed was seen.

So what we would see here for C-- is a spike. What is happening is that there is a parasitic inductance connected in series with the parasitic capacitance. Together it will be seen that an RLC circuit is formed.

Let's do a simpler circuit, just the LC circuit. And that will itself give us a bunch of intuition.

The current through the capacitor, I know, is i(t), and that is simply given by C dv/dt.

The same thing could be done for the inductor. So recall for an inductor, the voltage across an inductor is related to L di/dt. And in this case, what is the voltage? Well, that voltage is simply v_I minus v and that is simply equal to L di/dt.

The inductor current in the integral form will be equal to C dv/dt. When we differentiate both sides, we will get a second differential equation.

To solve this, we need to use the method of homogeneous and particular solutions. The method had three steps. The first step of those three was to find the particular solution.

The second step of the method was to find a homogeneous solution.

Here, there's going to be a slight variation. In finding the homogeneous solution, we are going to use

four steps to do it.

This will be a four-step process. And then, our third step is the usual third step of the method of homogeneous and particular solutions, which is to create the total solution, where the total solution is

the sum of the particular and homogeneous solutions. And then you use the initial conditions to solve for the remaining constants.

Find particular, find homogeneous solution, and that the total solution will be the sum of the particular and homogeneous.

Let's go ahead and pick a step input for v_I.

Let's pick initial conditions for my two state variables, v across the capacitor and the current through my inductor.

So voltage across the capacitor at time t equal to 0 is 0. v(0)=0

And let's say the current through the inductor at time t equal to 0 is also 0. i(0)=0

So in other words, what I am looking for is the zero-state response, because my initial conditions for both my state variables- the current through the conductor and voltage across the capacitor has been picked to be 0.

So the first step to solve the differential equation is to go find a particular solution. Any solution

for v_P that satisfies the particular equation will be a solution. So in this case, let's guess v_P equals VI. By substituting, it can be seen that v_P equals V_I is indeed a solution, so this is the particular solution.

The homogeneous solution, as we recall, is a solution to the differential equation with the drive set to 0.

A four-step method is used to find the homogeneous solution. So it's four steps as part of the global step 2. Say, steps 2A to 2D. So let me start with the first step 2A.

In most of the cases, you're supposed to know what the answer is roughly, and then you go and guess.

So now if we assume a solution of the form A e raised to st and substitute that into the homogeneous equation.

An equation in s needs to be developed for A e raised to st to be a homogeneous solution..

This can be done by taking A e raised to st and sticking it in place of v_H in the homogeneous equation here. And when that is done that, you'll be able to cancel out the A's and a bunch of other stuff, and then you will be left with an equation in s. So that equation in s will be called the characteristic equation.

We will be left with LC s squared plus 1 equals 0.

This equation here in s is called a characteristic equation which is an extremely important equation.

So the second step was to really write down the characteristic equation. So 2B was to write the characteristic equation which is LC s squared plus 1 equals 0. And so that implies that s squared is equal to minus 1 by LC.

Step 2C will be to develop the roots of the characteristic equation, So in this case, s squared equals minus 1 by LC. So if the minus sign did not exist, s would simply be square root of 1 by LC, plus or minus that. Now, since a minus 1 exists, I stick in the square root of minus 1 out here, which is j.

So those are the roots of my characteristic equation, plus or minus j square root of 1 by LC.

Omega-naught is equal to square root of 1 by LC. So the roots of my characteristic equation are

plus or minus j omega 0. Step 2D simply involves writing the general solution to the homogeneous equation.

So A1e raised to j omega 0 t is one solution. And the second one is the other root, Ae raised to minus

j omega-naught t. So this is the general solution to the homogeneous equation. A1e raised to j omega-naught t and A2e raised to minus j omega-naught t, which correspond to these two roots.

Then we reach the third step which is to create the total solution, which is the sum of the particular and homogeneous solutions. And then you use the initial conditions to solve for the remaining constants.

If v(0)= 0, so at time t equal to 0, we get V_I. And if I substitute time t equal to 0 here and here, we just get A1 plus A2.

i (t)=C dv/dt. So I'm told that that is 0. So dv/dt of the first part is a constant, so that is 0.

So if we differentiate the second part with respect to t, we get j omega naught coming down, and e raised to j omega naught t.

And then, for the next part, we get minus C A2 j omega naught e raised to minus j omega naught t. So I just obtained dv/dt of this one and multiplied that out by C.

So this evaluated at t equals 0 is simply C A1 j omega naught minus C A2 j omega naught.

And that equals 0.

.

Lecture Notes:- http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-and-electronics-spring-2007/video-lectures/6002_l15.pdf

Second-order systems will have two independent energy storage elements.for example, have a capacitor and an inductor, or you might have two capacitors that are independent of each other.

We are going to get dynamics that are governed by second-order differential equations.

An inverter driving another inverter. is a perfectly good system to study for second-order systems.

The equivalent circuits for these two inverters consists of a a five-volt supply V_S, two MOSFETS, load resistors and parasitic capacitance

The reason they are called them parasitic capacitances is that it's not something we usually see, but it's something that appears whether we like it or not.

We are going to look at what the waveforms are going to look like at A, B, and C.

So let's say the waveform at A is some square wave that looks like this. 0 to 5, back down to 0, and then up, to 5 again. So that is my waveform at A. So as a low voltage is applied at V_A, a high voltage is obtained at V_B. And then when A jumps up to a high value, Bgets pulled down low. So the B node gets pulled down low, and it goes down pretty fast. And the reason it goes down pretty fast, as you will, is that the on resistance of the MOSFET is very, very low. So when VA falls here, the first time transistor is going to shut off, and the node B needs to be pulled up to a high value.

Now notice that the capacitor is initially charged to a low value, C_GS, and it needs to charge up through the five-volt and the 2K resistor, and there's the C_GS.

So in this case, let's assume it's a pretty large time constant, the waveform is going to start off at 0, and it will be rising like a capacitor charging up. Again, this is going to reflect some time constant. Tau, the time constant for this, would be reflective of two kilohms times C_GS.

Then when V_A rises again, V_B is going to drop. Because R on is very low, it's going to drop quickly. And then it's going to continue like this.

So V_C will start off at 0, because V_B is high. And then V_C goes up to five volts because V_B is low. And then at this point, VB starts to rise. At some point, VB is going to rise high enough to hit the threshold value for the MOSFET at the second inverter. And so because the MOSFET turns on, as the voltage at B goes above the threshold value for the MOSFET whose input is B, the output is going to fall. So, at some point, the MOSFET output , the second inverter output, V_C is going to fall. And then, as the signal at B goes down, the output at C is going to go up again.

As node B rose up slowly, the voltage took some time to get to VT, and because of that, there was a delay at C. So what do we do? We are going to try to speed up node B by reducing the time constant. We can say, hey, let's go change C_GS. But C_GS is there so it cannot be changed.

So we have to try to reduce R_L, the 2-kilohm resistor. To do that, a 50-ohm resistor is placed in parallel with the 2-kilohm resistor, together with a switch. So when the switch is shut, then the 50-ohm resistor comes in parallel with the 2-kilohm resistor, making the effective parallel resistance more or less 50 ohms.

At some point at B, sharply rising waveform was expected to be seen but instead,

an oscillatory waveform that seemed to oscillate, and decayed was seen.

So what we would see here for C-- is a spike. What is happening is that there is a parasitic inductance connected in series with the parasitic capacitance. Together it will be seen that an RLC circuit is formed.

Let's do a simpler circuit, just the LC circuit. And that will itself give us a bunch of intuition.

The current through the capacitor, I know, is i(t), and that is simply given by C dv/dt.

The same thing could be done for the inductor. So recall for an inductor, the voltage across an inductor is related to L di/dt. And in this case, what is the voltage? Well, that voltage is simply v_I minus v and that is simply equal to L di/dt.

The inductor current in the integral form will be equal to C dv/dt. When we differentiate both sides, we will get a second differential equation.

To solve this, we need to use the method of homogeneous and particular solutions. The method had three steps. The first step of those three was to find the particular solution.

The second step of the method was to find a homogeneous solution.

Here, there's going to be a slight variation. In finding the homogeneous solution, we are going to use

four steps to do it.

This will be a four-step process. And then, our third step is the usual third step of the method of homogeneous and particular solutions, which is to create the total solution, where the total solution is

the sum of the particular and homogeneous solutions. And then you use the initial conditions to solve for the remaining constants.

Find particular, find homogeneous solution, and that the total solution will be the sum of the particular and homogeneous.

Let's go ahead and pick a step input for v_I.

Let's pick initial conditions for my two state variables, v across the capacitor and the current through my inductor.

So voltage across the capacitor at time t equal to 0 is 0. v(0)=0

And let's say the current through the inductor at time t equal to 0 is also 0. i(0)=0

So in other words, what I am looking for is the zero-state response, because my initial conditions for both my state variables- the current through the conductor and voltage across the capacitor has been picked to be 0.

So the first step to solve the differential equation is to go find a particular solution. Any solution

for v_P that satisfies the particular equation will be a solution. So in this case, let's guess v_P equals VI. By substituting, it can be seen that v_P equals V_I is indeed a solution, so this is the particular solution.

The homogeneous solution, as we recall, is a solution to the differential equation with the drive set to 0.

A four-step method is used to find the homogeneous solution. So it's four steps as part of the global step 2. Say, steps 2A to 2D. So let me start with the first step 2A.

In most of the cases, you're supposed to know what the answer is roughly, and then you go and guess.

So now if we assume a solution of the form A e raised to st and substitute that into the homogeneous equation.

This can be done by taking A e raised to st and sticking it in place of v_H in the homogeneous equation here. And when that is done that, you'll be able to cancel out the A's and a bunch of other stuff, and then you will be left with an equation in s. So that equation in s will be called the characteristic equation.

We will be left with LC s squared plus 1 equals 0.

This equation here in s is called a characteristic equation which is an extremely important equation.

So the second step was to really write down the characteristic equation. So 2B was to write the characteristic equation which is LC s squared plus 1 equals 0. And so that implies that s squared is equal to minus 1 by LC.

Step 2C will be to develop the roots of the characteristic equation, So in this case, s squared equals minus 1 by LC. So if the minus sign did not exist, s would simply be square root of 1 by LC, plus or minus that. Now, since a minus 1 exists, I stick in the square root of minus 1 out here, which is j.

So those are the roots of my characteristic equation, plus or minus j square root of 1 by LC.

Omega-naught is equal to square root of 1 by LC. So the roots of my characteristic equation are

plus or minus j omega 0. Step 2D simply involves writing the general solution to the homogeneous equation.

So A1e raised to j omega 0 t is one solution. And the second one is the other root, Ae raised to minus

j omega-naught t. So this is the general solution to the homogeneous equation. A1e raised to j omega-naught t and A2e raised to minus j omega-naught t, which correspond to these two roots.

Then we reach the third step which is to create the total solution, which is the sum of the particular and homogeneous solutions. And then you use the initial conditions to solve for the remaining constants.

If v(0)= 0, so at time t equal to 0, we get V_I. And if I substitute time t equal to 0 here and here, we just get A1 plus A2.

i (t)=C dv/dt. So I'm told that that is 0. So dv/dt of the first part is a constant, so that is 0.

So if we differentiate the second part with respect to t, we get j omega naught coming down, and e raised to j omega naught t.

And then, for the next part, we get minus C A2 j omega naught e raised to minus j omega naught t. So I just obtained dv/dt of this one and multiplied that out by C.

So this evaluated at t equals 0 is simply C A1 j omega naught minus C A2 j omega naught.

And that equals 0.

.

So I can simplify that. So C and C cancel out. j omega naught and j omega naught cancel out.

So I get A1 equals A2.

With the help of the other equation, A1 will be minus VI divided by 2. So therefore, A1 equals VI divided by 2, and that is also equal to A2

If we substitute the values of A1 and A2, we will get an equation where part of it seems familiar.

And the thing that comes to mind whenever you see e raised to j something plus e raised to minus j something, where j is the square root of minus 1, is the Euler relation. Eventually we get an equation which involves cos omega naught t. As i(t) is equal to C dv/dt, we get an equation which involves sin omega naught t for i(t).

When we plot the graph of v(t) with omega naught t as the x axis, we get a sinusoid output for a step input voltage and secondly, the voltage actually was higher than the input voltage that I had in my circuit.

When we plot the graph of i(t) with omega naught t as the x axis, we also get a sinusoid output.

So the overall structure of the method had the following steps.

(1) Write the differential equation for the circuit by applying the node method.

(2) Find a particular solution v_P by guessing at a solution.

(3) Find the homogeneous solution by using four steps.

(a) Assume solution of the form A e raised to st.

(b) Obtain the characteristic equation.

(c) Solve the characteristic equation for the roots s

(d) Form v_H by summing up the two terms. A1 e raised to s1 t plus A2 e raised to s2 t.

(4) Then I obtained the total solution by summing up the particular and the homogeneous solutions.

And then I solve for the remaining constants using the initial conditions.

For the undriven LC circuit, the input voltage is equal to zero, so the homogeneous equation can be used to find the response of the circuit.

My initial conditions are given here.

For v_c(0)=V, I get V = A1 + A2.

For i_c(0)=0, as i=C dv/dt, A1=A2

So we eventually get A1 =A2 = V/ 2.

So in terms of my solution, I can write down vc of t is equal to A1 e raised to j omega 0t plus A2 e raised to j omega 0t where A1 and A2 are both V divided by 2. So I can write that down as V/2 times e raised to j omega 0t plus e raised to minus j omega 0t. And from that, because I know from Euler's relation e raised to j omega 0t plus e raised to minus j omega 0t divided by 2 is simply cosine omega 0t. So this is simply V cosine omega 0t.

And for the current ic, it is simply c dv/dt which is CV minus omega0 sine omega 0t.

I just stuck a little capacitor and inductor together with the initial condition on the capacitor. And what that is telling me is that if I did that, that circuit will simply sit there and oscillate. The voltage will go back and forth between across the capacitor, then across the inductor. The energy goes back and forth.

If we plot graphs of v_c and i_c, with omega 0t as the x axis, a cosine and sine curve is obtained.

The energy graphs are more interesting. Let's say the energy in the capacitor is E_C, and the

energy in the inductor at any given point in time is E_L.

So for the energy plot, I use 1/2 CV squared for the capacitive energy. So for the capacitor, the energy is 1/2 CV_C squared. And for the inductor, the energy is 1/2 LI_C squared.

If V was the initial voltage of the capacitor, then that is at any given point. Then at the peak, the energy across the capacitor will be 1/2 CV squared, where we were given that the voltage across

the capacitor at V(0) was capital V. Similarly for the inductor, we can draw the same.

We can take 1/2 LI squared.And this is what we get, and so on. And in this case, what is interesting is that the energy stored across the capacitor initially, which is 1/2 C capital V squared, and then the energy sloshes back and forth between the inductor and capacitor.

The total here is the same as the total for the peak for the capacitor which is 1/2 C capital V squared.

So 1/2 CV_C squared plus 1/2 LI_C squared is equal to the total initial energy in the system, which is 1/2 C capital V squared, where V was the initial voltage across the capacitor.

When a resistor is introduced, there will be damping.

So I get A1 equals A2.

With the help of the other equation, A1 will be minus VI divided by 2. So therefore, A1 equals VI divided by 2, and that is also equal to A2

If we substitute the values of A1 and A2, we will get an equation where part of it seems familiar.

And the thing that comes to mind whenever you see e raised to j something plus e raised to minus j something, where j is the square root of minus 1, is the Euler relation. Eventually we get an equation which involves cos omega naught t. As i(t) is equal to C dv/dt, we get an equation which involves sin omega naught t for i(t).

When we plot the graph of v(t) with omega naught t as the x axis, we get a sinusoid output for a step input voltage and secondly, the voltage actually was higher than the input voltage that I had in my circuit.

When we plot the graph of i(t) with omega naught t as the x axis, we also get a sinusoid output.

So the overall structure of the method had the following steps.

(1) Write the differential equation for the circuit by applying the node method.

(2) Find a particular solution v_P by guessing at a solution.

(3) Find the homogeneous solution by using four steps.

(a) Assume solution of the form A e raised to st.

(b) Obtain the characteristic equation.

(c) Solve the characteristic equation for the roots s

(d) Form v_H by summing up the two terms. A1 e raised to s1 t plus A2 e raised to s2 t.

(4) Then I obtained the total solution by summing up the particular and the homogeneous solutions.

And then I solve for the remaining constants using the initial conditions.

For the undriven LC circuit, the input voltage is equal to zero, so the homogeneous equation can be used to find the response of the circuit.

My initial conditions are given here.

For v_c(0)=V, I get V = A1 + A2.

For i_c(0)=0, as i=C dv/dt, A1=A2

So we eventually get A1 =A2 = V/ 2.

So in terms of my solution, I can write down vc of t is equal to A1 e raised to j omega 0t plus A2 e raised to j omega 0t where A1 and A2 are both V divided by 2. So I can write that down as V/2 times e raised to j omega 0t plus e raised to minus j omega 0t. And from that, because I know from Euler's relation e raised to j omega 0t plus e raised to minus j omega 0t divided by 2 is simply cosine omega 0t. So this is simply V cosine omega 0t.

And for the current ic, it is simply c dv/dt which is CV minus omega0 sine omega 0t.

I just stuck a little capacitor and inductor together with the initial condition on the capacitor. And what that is telling me is that if I did that, that circuit will simply sit there and oscillate. The voltage will go back and forth between across the capacitor, then across the inductor. The energy goes back and forth.

If we plot graphs of v_c and i_c, with omega 0t as the x axis, a cosine and sine curve is obtained.

The energy graphs are more interesting. Let's say the energy in the capacitor is E_C, and the

energy in the inductor at any given point in time is E_L.

So for the energy plot, I use 1/2 CV squared for the capacitive energy. So for the capacitor, the energy is 1/2 CV_C squared. And for the inductor, the energy is 1/2 LI_C squared.

If V was the initial voltage of the capacitor, then that is at any given point. Then at the peak, the energy across the capacitor will be 1/2 CV squared, where we were given that the voltage across

the capacitor at V(0) was capital V. Similarly for the inductor, we can draw the same.

We can take 1/2 LI squared.And this is what we get, and so on. And in this case, what is interesting is that the energy stored across the capacitor initially, which is 1/2 C capital V squared, and then the energy sloshes back and forth between the inductor and capacitor.

The total here is the same as the total for the peak for the capacitor which is 1/2 C capital V squared.

So 1/2 CV_C squared plus 1/2 LI_C squared is equal to the total initial energy in the system, which is 1/2 C capital V squared, where V was the initial voltage across the capacitor.

When a resistor is introduced, there will be damping.

## Friday, April 29, 2016

### Modem repair

The modem broke down a couple days ago and I was wondering what was the issue. I opened up the modem thinking that there would be a burnt component inside but as it was , that wasn't actually the right step. It turned out that it was the adapter that was at fault.

So I had an old one that was like some kind of transformer with various output voltages 3,6, 7.5, 9, 12 being some of them. Adjustments for these adapters are not accurate, for instance the 9V could read 13V. So a multimeter is needed to find out what is the actual output voltage. It is probably not the best way to solve it but it kind of worked for a while. Then I think it got overheated or something,. As it was rated at 350mA, I thought it was the fault of the lack of currrent as the modem seemed to require 12V, 500 mA. This was not the actual case as I found out later that the adapter was able to output more that 500mA current. (around 1A to be exact).

So I went out a couple of times to get another one. There was an adapter rated at 12V 500mA but I settled for the cheaper solution which was another adapter with the adjustable voltages. As it turned out that did not really work - the reason seemed like the voltage output was just a little too low. Its 7.5V would read 12.5V. It appears that though the modem was rated at 12V, it actually needed a minimum of around 13V to function properly.

Fortunately I was able to find another old adapter that was able to output around 13.5 V. It seems to be working fine so far.

So I had an old one that was like some kind of transformer with various output voltages 3,6, 7.5, 9, 12 being some of them. Adjustments for these adapters are not accurate, for instance the 9V could read 13V. So a multimeter is needed to find out what is the actual output voltage. It is probably not the best way to solve it but it kind of worked for a while. Then I think it got overheated or something,. As it was rated at 350mA, I thought it was the fault of the lack of currrent as the modem seemed to require 12V, 500 mA. This was not the actual case as I found out later that the adapter was able to output more that 500mA current. (around 1A to be exact).

So I went out a couple of times to get another one. There was an adapter rated at 12V 500mA but I settled for the cheaper solution which was another adapter with the adjustable voltages. As it turned out that did not really work - the reason seemed like the voltage output was just a little too low. Its 7.5V would read 12.5V. It appears that though the modem was rated at 12V, it actually needed a minimum of around 13V to function properly.

Fortunately I was able to find another old adapter that was able to output around 13.5 V. It seems to be working fine so far.

## Wednesday, April 20, 2016

### Revision of Circuits and Electronics - State and Memory (Lecture 16)

Video Lectures: -http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-and-electronics-spring-2007/video-lectures/lecture-14/

Lecture Notes:- (Lecure 14 on OCW but lecture 16 on edX) http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-and-electronics-spring-2007/lecture-notes/

The key is that a capacitor can store a a state for an extended period of time.

The equation for RC charging circuit is v_c=v_c(0)+ (V_I -v_c(0))(1-e^(-t/RC)) . We ignored what happened all the way from minus infinity. v_c(0) was able to summarise the entire behaviour of the input from 0 backwards.

State is the summary of past inputs relevant to predicting the future. q and v are state variables.

v_c was a function of v_c(0) and a function of V_I(t).

Zero state is when v_c(0)=0. Zero input is when V_I(t)=0.

Zero state response (ZSR) occurs at v_c=V_I (1-e^(-t/RC)). The capacitor charges up.

Zero input response(ZIR) occurs at v_c=v_c(0)(e^(-t/RC)). The capacitor discharges.

The sum of the ZSR and ZIR gives the total response of the RC circuit

v_c=V_I+ (v_c(0)-V_I)(e^(-t/RC)). This is a form of superposition.

Why memory? The calculator remembers the partial result. It is needed to remember such results so that things can be done in sequence. Secondly, there is a need to remember transient inputs - signals that come and go away. Finally it is needed to store data.

With this in mind, starting with a simple example, a one bit memory element can be built. It will have d_OUT, d_IN and a STORE signal which tells the memory cell to replace existing value with new value from d_IN.

A camera has a shutter button which helps to store the image. Think of this as a little pulse which opens to allow the image to be appear on the storage medium of the film and when it closes whatever that was recorded will stay in the camera.

Using this analogy, a simple memory cell can be built. Let's say the waveforms for d_OUT, d_IN and STORE start at a low value. When d_IN goes high for a period of time , to store that value, a small STORE pulse can do the job. The STORE pulse is like a shutter release button. d_OUT will reflect what is at the input. The last value that the memory cells saw before the pulse went down to 0 is eventually stored in the memory cell. The output does not go to 1 instantaneously, rather that it meanders up and rises slowly.

In the first attempt to build a memory cell, a capacitor is needed to store a value that is going to be read out, d_OUT. d_IN and a switch is connected to the capacitor. The control input of the s witch is connected to the STORE signal. When the STORE signal has a high value, the switch is closed. If this is a perfectly ideal switch, and this is a true short circuit, and if d_IN comes from an ideal voltage source, then of course I'm going to see my capacitor charging instantaneously. However in pratice that is not the case - the switch has a resistor R_ON. So the capacitor has to charge through R_ON.

Let's say d_IN goes to a 1 and here is my store pulse that stays on for some period of time.

Let's say my dOUT is 0 to begin. As soon as the store pulse goes high, the switch goes into its On state. nd as soon as the switch goes into its On state, now the capacitor C begin surcharge through the resistor R_ON with the time constant, T given by R_ON*C.

As the capacitor begins to charge, the voltage at dOUT starts to rise. So this is the voltage of v_c, which turns out to be the same as d_OUT. So that starts to rise, and when the store pulse goes

Lecture Notes:- (Lecure 14 on OCW but lecture 16 on edX) http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-002-circuits-and-electronics-spring-2007/lecture-notes/

The key is that a capacitor can store a a state for an extended period of time.

The equation for RC charging circuit is v_c=v_c(0)+ (V_I -v_c(0))(1-e^(-t/RC)) . We ignored what happened all the way from minus infinity. v_c(0) was able to summarise the entire behaviour of the input from 0 backwards.

State is the summary of past inputs relevant to predicting the future. q and v are state variables.

v_c was a function of v_c(0) and a function of V_I(t).

Zero state is when v_c(0)=0. Zero input is when V_I(t)=0.

Zero state response (ZSR) occurs at v_c=V_I (1-e^(-t/RC)). The capacitor charges up.

Zero input response(ZIR) occurs at v_c=v_c(0)(e^(-t/RC)). The capacitor discharges.

The sum of the ZSR and ZIR gives the total response of the RC circuit

v_c=V_I+ (v_c(0)-V_I)(e^(-t/RC)). This is a form of superposition.

Why memory? The calculator remembers the partial result. It is needed to remember such results so that things can be done in sequence. Secondly, there is a need to remember transient inputs - signals that come and go away. Finally it is needed to store data.

With this in mind, starting with a simple example, a one bit memory element can be built. It will have d_OUT, d_IN and a STORE signal which tells the memory cell to replace existing value with new value from d_IN.

A camera has a shutter button which helps to store the image. Think of this as a little pulse which opens to allow the image to be appear on the storage medium of the film and when it closes whatever that was recorded will stay in the camera.

Using this analogy, a simple memory cell can be built. Let's say the waveforms for d_OUT, d_IN and STORE start at a low value. When d_IN goes high for a period of time , to store that value, a small STORE pulse can do the job. The STORE pulse is like a shutter release button. d_OUT will reflect what is at the input. The last value that the memory cells saw before the pulse went down to 0 is eventually stored in the memory cell. The output does not go to 1 instantaneously, rather that it meanders up and rises slowly.

In the first attempt to build a memory cell, a capacitor is needed to store a value that is going to be read out, d_OUT. d_IN and a switch is connected to the capacitor. The control input of the s witch is connected to the STORE signal. When the STORE signal has a high value, the switch is closed. If this is a perfectly ideal switch, and this is a true short circuit, and if d_IN comes from an ideal voltage source, then of course I'm going to see my capacitor charging instantaneously. However in pratice that is not the case - the switch has a resistor R_ON. So the capacitor has to charge through R_ON.

Let's say d_IN goes to a 1 and here is my store pulse that stays on for some period of time.

Let's say my dOUT is 0 to begin. As soon as the store pulse goes high, the switch goes into its On state. nd as soon as the switch goes into its On state, now the capacitor C begin surcharge through the resistor R_ON with the time constant, T given by R_ON*C.

As the capacitor begins to charge, the voltage at dOUT starts to rise. So this is the voltage of v_c, which turns out to be the same as d_OUT. So that starts to rise, and when the store pulse goes

away, that value will be held out there.

We need to find out the width of the store pulse. v_c=V_S (1-e^(-t/RC)) as this is a zero state response. The store pulse has to be wide enough for the v_c to charge to its valid high value V_OH.

Therefore V_OH=V_S (1-e^(-t_min/RC)) . The pulse width needs to be much larger than t_min to give enough leeway for the capacitor to reach its final value.

Now with the store =0, we need to find out how long is the charge going to sit on the capacitor. Suppose that the output is connected to some other circuit that has a load resistance R_L. In this case the capacitor will be discharging from a value V_S to a valid value V_OH. So we will need to find t_valid.

v_OH=V_S (e^(-t_valid/(R_L*C))) as this is a zero input response. Therefore t_valid=-R_L*C* ln(V_OH/V_S). This method does not really work as the capacitor discharges very quickly.

The second attempt is to add a pair of inverters (a buffer) to the output. The buffer has a large input resistance R_IN. The time constant is calculated to be about 1 millisecond which would give a better result for t_valid but still not good enough.

For the third attempt, the value is fed back to refresh the node. There is a switch that is connected to STORE bar in this loop. When STORE is a 0, the same value at the output is recycled to the capacitor and the capacitor is meant to be refreshed. This does not work because the external value can influence the storage node.

For the fourth attempt, the feedback loop is now placed after the first inverter and is connected to another inverter and a switch. The switch is connected to STORE bar. This works as there is no path from the output to the input as it is completely decoupled using the inverter. This is a static random access memory (SRAM) where the value of the memory cell stays valid for a long period of time.

An abstract 4 bit memory cell has an input, an output, a STORE signal and an address line. The address tells me which of the four bits of memory I am going to read or write. So the address is given by two bits 00 , 01 , 10 and 11. 00 will read to memory cell 1, 01 to memory cell 2 and so forth. If my address says two and if store is false, then my output should read the second memory cell. Similarly, if the address is two and store is on, then I should be writing into my memory cell two.

So to build the memory system, four memory cells are needed. The one bit output is connected to the four memory cells with switches A, B, C and D. The values of A, B, C and D are produced with a decoder. The address will be the input to the decoders while the outputs are connected to the A, B , C and D switches.

The INPUT is going to be connected to all d_IN. Then there will be AND gates which will be connected to the STORE signal and one of the the outputs of the decoder.

So let's take a look at how this works. So that say the address is 1, 0. If the address is 1, 0, then C is true. And when the store pulse comes on, both inputs are a one. And I get a store pulse on this memory cell. And then whatever's on the input line gets written on to that memory cell. And then following that, if I'll reread the memory cell, I make the store pulse go away. And if C is true, then the switch turns on. And the value can be read out on OUT.

From the truth table, at any given point in time, only one of A, B, C, or D is a 1. Memory cells

containing billions of memory elements are built using similar logic.

v_OH=V_S (e^(-t_valid/(R_L*C))) as this is a zero input response. Therefore t_valid=-R_L*C* ln(V_OH/V_S). This method does not really work as the capacitor discharges very quickly.

The second attempt is to add a pair of inverters (a buffer) to the output. The buffer has a large input resistance R_IN. The time constant is calculated to be about 1 millisecond which would give a better result for t_valid but still not good enough.

For the third attempt, the value is fed back to refresh the node. There is a switch that is connected to STORE bar in this loop. When STORE is a 0, the same value at the output is recycled to the capacitor and the capacitor is meant to be refreshed. This does not work because the external value can influence the storage node.

For the fourth attempt, the feedback loop is now placed after the first inverter and is connected to another inverter and a switch. The switch is connected to STORE bar. This works as there is no path from the output to the input as it is completely decoupled using the inverter. This is a static random access memory (SRAM) where the value of the memory cell stays valid for a long period of time.

An abstract 4 bit memory cell has an input, an output, a STORE signal and an address line. The address tells me which of the four bits of memory I am going to read or write. So the address is given by two bits 00 , 01 , 10 and 11. 00 will read to memory cell 1, 01 to memory cell 2 and so forth. If my address says two and if store is false, then my output should read the second memory cell. Similarly, if the address is two and store is on, then I should be writing into my memory cell two.

So to build the memory system, four memory cells are needed. The one bit output is connected to the four memory cells with switches A, B, C and D. The values of A, B, C and D are produced with a decoder. The address will be the input to the decoders while the outputs are connected to the A, B , C and D switches.

The INPUT is going to be connected to all d_IN. Then there will be AND gates which will be connected to the STORE signal and one of the the outputs of the decoder.

So let's take a look at how this works. So that say the address is 1, 0. If the address is 1, 0, then C is true. And when the store pulse comes on, both inputs are a one. And I get a store pulse on this memory cell. And then whatever's on the input line gets written on to that memory cell. And then following that, if I'll reread the memory cell, I make the store pulse go away. And if C is true, then the switch turns on. And the value can be read out on OUT.

From the truth table, at any given point in time, only one of A, B, C, or D is a 1. Memory cells

containing billions of memory elements are built using similar logic.

## Saturday, April 16, 2016

### Deleted draft!

I accidentally deleted my notes for lecture 16 and so it will take some time for the next post to come out.

I will try and run though it quickly and post by next week.

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